Matching output queueing with a multiple input/output-queued switch

• Published in: IEEE INFOCOM 2004 Vol. 2; pp. 1135 - 1146 vol.2
• Main Authors: LEE, Hyoung-Ii, SEO, Seoung-Woo
• Format: Conference Proceeding
• Language: English
• Published: Piscataway, New Jersey IEEE 2004
• Subjects: Aggregates; Applied sciences; Bandwidth; Emulation; Exact sciences and technology; Fabrics; Impedance matching; Interconnected networks; Laboratories; Memory architecture; Networks and services in france and abroad; Scheduling algorithm; Switches; Systems, networks and services of telecommunications; Telecommunications; Telecommunications and information theory; Teleprocessing networks. Isdn; Teletraffic; Traffic control; Interconnection network; Equity; Teletraffic; Mapping; Scheduling; Buffer system; Algorithm; Implementation; FIFO system; Queueing system; Traffic management; Traffic control; Selector switch
• ISBN: 0780383559; 9780780383555
• ISSN: 0743-166X; 2641-9874
• DOI: 10.1109/INFCOM.2004.1357000

We show that the multiple input/output-queued (MlOQ) switch proposed in our previous paper H. I. Lee and S. W. Seo (May 2003) can emulate an output-queued switch only with two parallel switches. The MIOQ switch requires no speedup and provides an exact emulation of an output-queued switch with a broad class of service scheduling algorithms including FIFO, weighted fair queueing (WFQ) and strict priority queueing regardless of incoming traffic pattern and switch size. First, we show that an N /spl times/ N MIOQ switch with a (2, 2)-dimensional crossbar fabric can exactly emulate an N /spl times/ N output-queued switch. For this purpose, we propose the stable strategic alliance (SSA) algorithm that can produce a stable many-to-many assignment, and then apply it to the scheduling of an MIOQ switch. Next, we prove that a (2, 2)-dimensional crossbar fabric can be implemented by two N /spl times/ N crossbar switches in parallel for an N /spl times/ N MIOQ switch. For a proper operation of two crossbar switches in parallel, each input-output pair matched by the SSA algorithm must be mapped to one of two crossbar switches. For this mapping, we propose a simple algorithm that requires at most 2N steps for all matched input-output pairs. In addition, to relieve the implementation burden of N input buffers being accessed simultaneously, we propose a buffering scheme called redundant buffering which requires two memory devices instead of N physically-separate memories.