A Review of Improved CMOS Dynamic Comparators
This paper reviews some CMOS dynamic comparators that achieving high performances on different features. Based on conventional structures, a comparator with a dynamic floating inverter amplifier optimize their circuit by a floating reservoir capacitor, which achieves the best energy efficiency while...
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Published in | 2022 IEEE International Conference on Electrical Engineering, Big Data and Algorithms (EEBDA) pp. 734 - 741 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
25.02.2022
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Subjects | |
Online Access | Get full text |
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Summary: | This paper reviews some CMOS dynamic comparators that achieving high performances on different features. Based on conventional structures, a comparator with a dynamic floating inverter amplifier optimize their circuit by a floating reservoir capacitor, which achieves the best energy efficiency while is insensitive to common-mode voltage. The optimization of the Elzakker's comparators increases the pre-amplifier stage's structures by adding a tail capacitor and a tail transistor. And three-stage comparator with extra parallel feedback is discussed, decreasing delay significantly. The classic comparator comprises a differential input stage, two regenerative flip-flops, and an S-R latch is also mentioned. |
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DOI: | 10.1109/EEBDA53927.2022.9745016 |