Investigation of Etching SIC VIAS for High Power Elctronics and Harsh Enviornment Mems

This paper describes the research on the process development and process optimization of via etching of silicon carbide using reactive ion etching. The experiments were performed using a design of experiments (DOE) with a total 26 experiments and D-efficiency of over 85.4 finding the most significan...

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Bibliographic Details
Published in2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC) pp. 1 - 6
Main Authors Mackowiak, Piotr, Erbacher, Kolja, Schiffer, Michael, Ngo, Ha-Duong, Schneider-Ramelow, Martin, Lang, Klaus-Dieter
Format Conference Proceeding
LanguageEnglish
Published IEEE 15.09.2020
Subjects
DOE
MEMS
Power Electronics
RIE
SiC
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Summary:This paper describes the research on the process development and process optimization of via etching of silicon carbide using reactive ion etching. The experiments were performed using a design of experiments (DOE) with a total 26 experiments and D-efficiency of over 85.4 finding the most significant process parameters impacting the etch result. Optimizing the process we could achieve etch depth of 200µm with an etch rate of up to 2µm/min. The ability of etching SiC with a high etch rate enables new application for harsh environments micro electromechanical systems (MEMS) and high power electronics.
DOI:10.1109/ESTC48849.2020.9229659