Low Power Spiking Neural Network Circuit with Compact Synapse and Neuron Cells

Spiking neural networks performs efficient learning and recognition tasks by mimicking the neural biology of human brain. To realize a large-scale network on chip for mobile applications an area and power optimized electronic neuron along with synapse is essential. In this paper we present an analog...

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Bibliographic Details
Published in2020 International SoC Design Conference (ISOCC) pp. 157 - 158
Main Authors Asghar, Malik Summair, Arslan, Saad, Kim, HyungWon
Format Conference Proceeding
LanguageEnglish
Published IEEE 21.10.2020
Subjects
Artificial Neural Networks(ANN)
Biological neural networks
CMOS
Image classification
Leaky Integrate and Fire(LIF)
Membrane potentials
Mobile applications
Neuromorphic
Neurons
Power demand
Spike Neural Network(SNN)
Synapses
Task analysis
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Summary:Spiking neural networks performs efficient learning and recognition tasks by mimicking the neural biology of human brain. To realize a large-scale network on chip for mobile applications an area and power optimized electronic neuron along with synapse is essential. In this paper we present an analog CMOS based implementation of neuron and synapse circuits realized using 180nm process. The neurons integrate input currents from the synapse inputs and generate a spike output event based on the membrane potential. The proposed circuits have been optimized for area and power consumption and therefore can be used as key components to form a large spiking neural network.
DOI:10.1109/ISOCC50952.2020.9333105