Cyclic greedy generation method for limited number of IDDQ tests
This paper proposes a generation method (called Cyclic Greedy generation method) of IDDQ test sets for maximizing the number of detected faults under the constraint that the number of test patterns is limited. First this method greedily generates the given limited number of test patterns, then it gr...
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Published in | Proceedings - Asian Test Symposium pp. 362 - 366 |
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Main Authors | , , |
Format | Conference Proceeding Journal Article |
Language | English |
Published |
IEEE
2000
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Subjects | |
Online Access | Get full text |
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Summary: | This paper proposes a generation method (called Cyclic Greedy generation method) of IDDQ test sets for maximizing the number of detected faults under the constraint that the number of test patterns is limited. First this method greedily generates the given limited number of test patterns, then it greedily re-generates each pattern sequentially all over again and again in a cyclic manner. Each test pattern is generated by the iterative improvement method of random patterns. The experimental results show that the number of undetected faults remained by the Cyclic Greedy generation method is 13% less than by the pure greedy generation method in average for the large ISCAS85&89 circuits. |
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Bibliography: | SourceType-Scholarly Journals-2 ObjectType-Feature-2 ObjectType-Conference Paper-1 content type line 23 SourceType-Conference Papers & Proceedings-1 ObjectType-Article-3 |
ISBN: | 0769508871 9780769508870 |
ISSN: | 1081-7735 2377-5386 |
DOI: | 10.1109/ATS.2000.893650 |