Guest Editorial: IEEE TC Special Section on Compiler Optimizations for FPGA-Based Systems

The papers in this special section focus on compiler optimization for FPGA-based systems. Reconfigurable computing (RC) is growing in importance in many computing domains and systems, from embedded, mobile to cloud, and high-performance computing. We have witnessed important advancements regarding t...

Full description

Saved in:
Bibliographic Details
Published inIEEE transactions on computers Vol. 70; no. 12; pp. 2013 - 2014
Main Authors Cardoso, Joao MP, DeHon, Andre, Pozzi, Laura
Format Journal Article
LanguageEnglish
Published New York IEEE 01.12.2021
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Applications programs
Compilers
Field programmable gate arrays
High level languages
Optimization
Platforms
Predictive models
Program processors
Programming languages
Reconfigurable architectures
Special issues and sections
Online AccessGet full text

Cover

More Information
Summary:The papers in this special section focus on compiler optimization for FPGA-based systems. Reconfigurable computing (RC) is growing in importance in many computing domains and systems, from embedded, mobile to cloud, and high-performance computing. We have witnessed important advancements regarding the programming of RC-based systems, but further improvements are needed, especially regarding efficient techniques for automatic mapping of computations described in high-level languages to the RC resources. The resources of high-end FPGAs allow these devices to implement complex Systemson- a-Chip (SoCs) and substantial computational components of software applications, e.g., when used as hardware accelerators and/or as more energy-efficient computing platforms. This, however, increases the continuous need for efficient compilers targeting FPGAs, and other RC platforms, from high-level programming languages.
ISSN:0018-9340
1557-9956
DOI:10.1109/TC.2021.3117316