DEMAC: A Modular Platform for HW-SW Co-Design

• Published in: 2020 IEEE/ACM Fourth Annual Workshop on Emerging Parallel and Distributed Runtime Systems and Middleware (IPDRM) pp. 25 - 32
• Main Authors: Perdomo, Diego A. Roa, Kabrick, Ryan, Diaz, Jose M. Monsalve, Raskar, Siddhisanket, Fox, Dawson, Gao, Guang R.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.11.2020
• Subjects: 16-core coprocessor; 3D-printed frames; Cluster; cluster computing; Codelet Model; Computational modeling; Computer architecture; Computers; coprocessors; DARTS; data flow computing; Dataflow Codelet Model; Dataflow Model; Delaware Modular Assembly Cluster; DEMAC; dual-core ARM processor; embedded systems; energy efficiency; Epiphany; Ethernet network; Exa-scale; field programmable gate arrays; flexible research platform; FPGA; Hardware; hardware-software co-design; hardware-software codesign; high performance computers; HPC machines; HW-SW co-design; low-cost parallel platforms; Many-core architecture; multicore embedded systems; multiprocessing systems; nonuniform memory access; open source stack; parallel architectures; parallel machines; Parallel processing; parallel programming; Parallella boards; Program Execution Model; program execution models research; research labs; Software-Hardware Co-design; supercomputers; Synchronization; system-on-chip; versatile parallel machine; Zynq-7000 series SoC
• DOI: 10.1109/IPDRM51949.2020.00008

Scientists running applications on high performance computers expect these systems to deliver a high throughput effectively and reliably, while maintaining flexibility, programmability and energy efficiency. Programs are usually translated from a coded language that defines the operation of these systems through a compiler. HPC machines exhibit different features and behaviors based on their architectural characteristics: they could have accelerators or be a collection of computational units with a non-uniform memory access. Aiming to develop a low-cost, flexible and versatile parallel machine for hardware-software co-design of program execution models research, we present DEMAC (the Delaware Modular Assembly Cluster). It provides the necessary tools to develop and test novel features for the next generation of supercomputers. It includes a set of 3D-printed frames that can house several card-sized multi-core embedded systems. Along with a full open source stack, these small computers feature Parallella boards containing a Zynq-7000 series SoC with a dual-core ARM processor and an FPGA that interconnects with a 16-core coprocessor called Epiphany. All individual nodes are connected through an Ethernet network. An initial version of a runtime based on Dataflow's Codelet Model is also proposed. This project aims to provide a flexible research platform that could benefit different research labs looking for low-cost parallel platforms.