Application Example of a Novel Methodology to Generate IC Models for System ESD and Electrical Stress Simulation out of the Design Data

Generating IC models for system ESD simulations out of measurements is quite cumbersome. For products with custom-made ESD protection concepts one cannot use a model library for I/O standard cells. This work shows an application example of a novel methodology to generate IC ESD models out of design...

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Bibliographic Details
Published in2019 41st Annual EOS/ESD Symposium (EOS/ESD) Vol. EOS-41; pp. 1 - 8
Main Authors Ammer, Michael, Rupp, Andreas, Glaser, Ulrich, Cao, Yiqun, Sauter, Martin, Maurer, Linus
Format Conference Proceeding
LanguageEnglish
Published EOS/ESD Association, Inc 01.09.2019
Subjects
Data models
Electrostatic discharges
Integrated circuit modeling
Libraries
Resistance
Wiring
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Summary:Generating IC models for system ESD simulations out of measurements is quite cumbersome. For products with custom-made ESD protection concepts one cannot use a model library for I/O standard cells. This work shows an application example of a novel methodology to generate IC ESD models out of design data.
DOI:10.23919/EOS/ESD.2019.8869981