Mastering the NEC Vector Engine Accelerator for Analytical Query Processing

• Published in: 2021 IEEE 37th International Conference on Data Engineering Workshops (ICDEW) pp. 60 - 65
• Main Authors: Ungethum, Annett, Schmidt, Lennart, Pietrzyk, Johannes, Habich, Dirk, Lehner, Wolfgang
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.04.2021
• Subjects: Abstraction; Bandwidth; Conferences; Data engineering; IEEE activities; Programming; Query processing; Registers; Vectorization
• ISSN: 2473-3490
• DOI: 10.1109/ICDEW53142.2021.00018

NEC Corporation offers a vector engine as a specialized co-processor having two unique features. On the one hand, it operates on vector registers multiple times wider than those of recent mainstream x86-processors. On the other hand, this accelerator provides a memory bandwidth of up to 1.2TB/s for 48GB of main memory. Both features are interesting for analytical query processing: First, vectorization based on the Single Instruction Multiple Data (SIMD) paradigm is a state-of-the-art technique to improve the query performance on x86-processors. Thus, for this accelerator we are able to use the same programming, processing, and optimization concepts as for the host x86-processor. Second, this vector engine is an optimal platform for investigating the efficient vector processing on wide vector registers. To achieve that, we describe an approach to master this co-processor for analytical query processing using a column-store specific abstraction layer for vectorization in this paper. We also detail on selected evaluation results to show the benefits and shortcomings of our approach as well as of the coprocessor compared to x86-processors. We conclude the paper with a discussion on interesting future research activities.