Parallel Application Power and Performance Prediction Modeling Using Simulation

High performance computing (HPC) system runs compute-intensive parallel applications requiring large number of nodes. An HPC system consists of heterogeneous computer architecture nodes, including CPUs, GPUs, field programmable gate arrays (FPGAs), etc. Power capping is a method to improve parallel...

Full description

Saved in:
Bibliographic Details
Published inProceedings - Winter Simulation Conference pp. 1 - 12
Main Authors Ahmed, Kishwar, Yoshii, Kazutomo, Tasnim, Samia
Format Conference Proceeding
LanguageEnglish
Published IEEE 12.12.2021
Subjects
Computational modeling
Computer architecture
Data models
Heterogeneous networks
Power measurement
Predictive models
Processor scheduling
Online AccessGet full text
ISSN1558-4305
DOI10.1109/WSC52266.2021.9715340

Cover

More Information
Summary:High performance computing (HPC) system runs compute-intensive parallel applications requiring large number of nodes. An HPC system consists of heterogeneous computer architecture nodes, including CPUs, GPUs, field programmable gate arrays (FPGAs), etc. Power capping is a method to improve parallel application performance subject to variable power constraints. In this paper, we propose a parallel application power and performance prediction simulator. We present prediction model to predict application power and performance for unknown power-capping values considering heterogeneous computing architecture. We develop a job scheduling simulator based on parallel discrete-event simulation engine. The simulator includes a power and performance prediction model, as well as a resource allocation model. Based on real-life measurements and trace data, we show the applicability of our proposed prediction model and simulator.
ISSN:1558-4305
DOI:10.1109/WSC52266.2021.9715340