Analysis of noise suppression techniques using embedded capacitor on split power bus in multi-layer package

• Published in: 2004 International Symposium on Electromagnetic Compatibility (IEEE Cat. No.04CH37559) Vol. 1; pp. 215 - 220 vol.1
• Main Authors: Youchul Jeong, Kim, Joungho, Lu, A.C.W., Wai, L.L., Wei Fan, Lok, B.K., Wong, C.K.
• Format: Conference Proceeding
• Language: English
• Published: Piscataway NJ IEEE 2004
• Subjects: Applied sciences; Capacitance; Capacitors. Resistors. Filters; Detection, estimation, filtering, equalization, prediction; Dielectric, amorphous and glass solid devices; Electrical engineering. Electrical power engineering; Electromagnetic interference; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Exact sciences and technology; Frequency; High K dielectric materials; High-K gate dielectrics; Inductance; Information, signal and communications theory; Noise reduction; Packaging; Power capacitors; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Signal and communications theory; Signal, noise; Telecommunications and information theory; Testing; Various equipment and components; Noise reduction; Transfer characteristic; Multiple layer; Power capacitor; Bus(channel); Noise control; Interconnection; Electronic packaging; Integrated circuit; Signal processing; System simulation; Impedance; Comparative study
• DOI: 10.1109/ISEMC.2004.1350028
• ISBN: 0780384431; 9780780384439

An embedded capacitor for noise suppression on a power bus is analyzed and compared with a discrete capacitor by full wave simulation from 40 MHz to 5 GHz. In this paper, the design methodology of the power bus is demonstrated by analyzing self and transfer impedance characteristic of the embedded capacitor.