Analysis of noise suppression techniques using embedded capacitor on split power bus in multi-layer package

An embedded capacitor for noise suppression on a power bus is analyzed and compared with a discrete capacitor by full wave simulation from 40 MHz to 5 GHz. In this paper, the design methodology of the power bus is demonstrated by analyzing self and transfer impedance characteristic of the embedded c...

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Published in2004 International Symposium on Electromagnetic Compatibility (IEEE Cat. No.04CH37559) Vol. 1; pp. 215 - 220 vol.1
Main Authors Youchul Jeong, Kim, Joungho, Lu, A.C.W., Wai, L.L., Wei Fan, Lok, B.K., Wong, C.K.
Format Conference Proceeding
LanguageEnglish
Published Piscataway NJ IEEE 2004
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Summary:An embedded capacitor for noise suppression on a power bus is analyzed and compared with a discrete capacitor by full wave simulation from 40 MHz to 5 GHz. In this paper, the design methodology of the power bus is demonstrated by analyzing self and transfer impedance characteristic of the embedded capacitor.
ISBN:0780384431
9780780384439
DOI:10.1109/ISEMC.2004.1350028