Demonstration and Optimization of Multi-Fin Dual Spacer FinFET for Reliable Sub-THz Frequency Operation

• Published in: Proceedings of the ... IEEE Conference on Nanotechnology pp. 25 - 29
• Main Authors: Patel, J., Aggarwal, N., Bagga, N., Kumar, V., Dixit, A., Kumar, N., Georgiev, V., Dasgupta, S.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 08.07.2024
• Subjects: Cutoff frequency; Dual-dielectric; FinFETs; Frequency modulation; Logic gates; Multi-fin FinFET; Performance evaluation; Resistance; Small-signal model; Spacer engineering; Stability analysis; Sub-THz frequency
• ISSN: 1944-9380
• DOI: 10.1109/NANO61778.2024.10628608

This paper proposes a dual dielectric (DD) spacer multi-fin (MF) FinFET for sub-THz frequency operation. The placement of the DD spacers over the source/drain (S/D) extension regions offers additional capacitances, which are included in the modified small-signal model to predict the Y-parameter behavior accurately. The modeled Y-parameters are in good agreement with the TCAD-extracted data. Dual spacer capacitance increases the gate coupling and thus improves the DC performance. The optimized device shows the stable marginal frequency (f_{m}) of 88.2 GHz, which is 21% higher than the baseline FinFET but at the cost of a diminished ratio of cut-off frequency to maximum oscillation frequency (f_{T}/f_{max}) due to additional spacer capacitance. f_{T} and f_{max} are obtained as 358 GHz and 579 GHz, respectively, for the optimal dual dielectric length. The paper thoroughly explores the behavior of capacitance and resistance modulation, transconductance, and intrinsic gain concerning the highic spacer length and the number of fins (n). A comprehensive analysis of various RF and stability figure-of-merits (FoMs) is conducted to determine the optimal operating conditions.