GPU Acceleration of Head-Gordon-Pople Algorithm

The electron repulsion integral (ERI) is a fundamental quantity in computational quantum chemistry, derived from the Coulomb interaction between pairs of electrons in a molecule. ERIs are among the most computationally intensive tasks in the field, due to their inherent complexity and the large numb...

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Bibliographic Details
Published inInternational Symposium on Computing and Networking (Online) pp. 115 - 124
Main Authors Suzuki, Kanta, Ito, Yasuaki, Fujii, Haruto, Yokogawa, Nobuya, Tsuji, Satoki, Nakano, Koji, Kasagi, Akihiko
Format Conference Proceeding
LanguageEnglish
Published IEEE 26.11.2024
Subjects
Complexity theory
computational quantum chemistry
CUDA
Degradation
electron repulsion integrals
Electrons
GPU
Graphics processing units
Head-Gordon-Pople algorithm
Instruction sets
Parallel processing
Quantum chemistry
Registers
Technological innovation
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Summary:The electron repulsion integral (ERI) is a fundamental quantity in computational quantum chemistry, derived from the Coulomb interaction between pairs of electrons in a molecule. ERIs are among the most computationally intensive tasks in the field, due to their inherent complexity and the large number of calculations required. The Head-Gordon-Pople (HGP) algorithm is a widely recognized method for efficiently calculating ERIs. This study presents an optimized GPU-based parallel computation approach tailored for the HGP algorithm. A key innovation of this research is introducing a new thread assignment strategy that leverages parallel thread groups, called warps, which execute the same instruction concurrently. This strategy significantly reduces the use of atomicAdd instructions, which handle exclusive addition operations to GPU device memory. Our theoretical analysis shows that the proposed method can reduce atomicAdd usage by up to 1/810. Furthermore, experimental results demonstrate that the proposed GPU implementation on an NVIDIA A100 GPU achieves up to a 2.19-fold speedup compared to a simpler thread assignment method and over a 1,900-fold speedup compared to a sequential implementation on an AMD EPYC 7702 CPU.
ISSN:2379-1896
DOI:10.1109/CANDAR64496.2024.00021