A Dual-Kernel Size-Configurable Gaussian Filter Architecture

Image processing applications are crucial for many battery-powered devices that we use every day. These applications require power-efficient architectures to meet power requirements. Gaussian filters are commonly used in image processing applications to enhance images subject to power and quality re...

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Published in2024 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) pp. 1 - 5
Main Authors Monteiro, Marcio, Seidel, Ismael, Guntzel, Jose, Grellert, Mateus, Soares, Leonardo, Meinhardt, Cristina
Format Conference Proceeding
LanguageEnglish
Published IEEE 02.09.2024
Subjects
Approximate computing
Computer architecture
Configurable Kernel Size
Gaussian Filter
Hardware
Hardware Optimization
Hardware Reuse
Image processing
Integrated circuits
Kernel
Power filters
Power quality
Proposals
System analysis and design
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DOI10.1109/SBCCI62366.2024.10703872

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Summary:Image processing applications are crucial for many battery-powered devices that we use every day. These applications require power-efficient architectures to meet power requirements. Gaussian filters are commonly used in image processing applications to enhance images subject to power and quality restrictions. In this work, we propose a dual kernel size configurable Gaussian filter design with hardware shared between the kernels to meet power and quality restrictions without redesigning it. Our design achieves results similar to the standalone kernel architectures with 1 dB improvement for 3×3 kernel. The configurable design reduces the area by 13% and decreases total power up to 52% when operating with the 3×3 mode and 27% for the 5×5 mode, compared to a unified 3×3 and 5×5 kernel design.
DOI:10.1109/SBCCI62366.2024.10703872