Electrical Test Structures for Investigating the Effects of Optical Proximity Correction
Electrical test structures have been designed to enable the characterisation of corner serif forms of optical proximity correction. These structures measure the resistance of a conducting track with a right angled corner. Varying amounts of OPC have been applied to the outer and inner corners of the...
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Published in | 2009 IEEE International Conference on Microelectronic Test Structures pp. 162 - 167 |
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Main Authors | , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.03.2009
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Subjects | |
Online Access | Get full text |
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Summary: | Electrical test structures have been designed to enable the characterisation of corner serif forms of optical proximity correction. These structures measure the resistance of a conducting track with a right angled corner. Varying amounts of OPC have been applied to the outer and inner corners of the feature and the effect on the resistance of the track investigated. A prototype test mask has been fabricated which contains test structures suitable for on-mask electrical measurement. The same mask was used to print the structures using an i-line lithography tool for on-wafer characterisation. Results from the structures at wafer level have shown that OPC has an impact on the final printed features. In particular the level of corner rounding is dependent upon the dimensions of the OPC features employed and the measured resistance can be used to help quantify the level of aggressiveness of the inner corner serifs. |
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ISBN: | 1424442591 9781424442591 |
ISSN: | 1071-9032 2158-1029 |
DOI: | 10.1109/ICMTS.2009.4814632 |