Integration of the ZoneBOND™ temporary bonding material in backside processing for 3D applications

• Published in: 2012 4th Electronic System-Integration Technology Conference pp. 1 - 4
• Main Authors: Jourdain, A., Phommahaxay, A., Verbinnen, G., Suhard, S., Miller, A., Manna, A. La, Swinnen, B., Beyer, G., Beyne, E.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.09.2012
• ISBN: 1467346454; 9781467346450
• DOI: 10.1109/ESTC.2012.6542112

Among the many 3D technology options that are being explored today, the 3D-stacked IC approach has become a mature and economically viable technology and provides the highest density for 3D interconnects to date. A key step in this process is the bonding of the device wafer to a carrier wafer prior to wafer thinning, by using a temporary adhesive layer. While great progress has been made over the past 2 years with respect to the wafer-support system, some of these materials including thermoplastics, laser-degradable or chemically dissolvable materials can present some integration limitations, especially if low-melting-point solders or high-topography structures are present on the backside of the wafers. The approach pursued by imec was for the first time demonstrated on full CMOS wafers using the BSI HT-10.10 thermoplastic material in a 300mm production line, and this work furthers the previous development by successfully demonstrating the integration of the room temperature peelable ZoneBOND temporary bonding material from Brewer Science as a one-to-one alternative to the BSI HT-10.10 material.