Systematic defect identification through layout snippet clustering

Systematic defects due to design-process interactions are a dominant component of integrated circuit (IC) yield loss in nano-scaled technologies. Test structures do not adequately represent the product in terms of feature diversity and feature volume, and therefore are unable to identify all the sys...

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Bibliographic Details
Published in2010 IEEE International Test Conference pp. 1 - 10
Main Authors Wing Chiu Tam, Poku, O, Blanton, R D
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.11.2010
Subjects
Clustering algorithms
Feature extraction
Integrated circuits
Layout
Libraries
Partitioning algorithms
Systematics
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Summary:Systematic defects due to design-process interactions are a dominant component of integrated circuit (IC) yield loss in nano-scaled technologies. Test structures do not adequately represent the product in terms of feature diversity and feature volume, and therefore are unable to identify all the systematic defects that affect the product. This paper describes a method that uses diagnosis to identify layout features that do not yield as expected. Specifically, clustering techniques are applied to layout snippets of diagnosis-implicated regions from (ideally) a statistically-significant number of IC failures for identifying feature commonalties. Experiments involving an industrial chip demonstrate the identification of possible systematic yield loss due to lithographic hotspots.
ISBN:9781424472062
1424472067
ISSN:1089-3539
2378-2250
DOI:10.1109/TEST.2010.5699239