APA (7th ed.) Citation

Jerry, M., Aziz, A., Ni, K., Datta, S., Gupta, S. K., & Shukla, N. (2018, June). A Threshold Switch Augmented Hybrid-FeFET (H-FeFET) with Enhanced Read Distinguishability and Reduced Programming Voltage for Non-Volatile Memory Applications. 2018 IEEE Symposium on VLSI Technology, 129-130. https://doi.org/10.1109/VLSIT.2018.8510679

Chicago Style (17th ed.) Citation

Jerry, M., A. Aziz, K. Ni, S. Datta, S. K. Gupta, and N. Shukla. "A Threshold Switch Augmented Hybrid-FeFET (H-FeFET) with Enhanced Read Distinguishability and Reduced Programming Voltage for Non-Volatile Memory Applications." 2018 IEEE Symposium on VLSI Technology Jun. 2018: 129-130. https://doi.org/10.1109/VLSIT.2018.8510679.

MLA (9th ed.) Citation

Jerry, M., et al. "A Threshold Switch Augmented Hybrid-FeFET (H-FeFET) with Enhanced Read Distinguishability and Reduced Programming Voltage for Non-Volatile Memory Applications." 2018 IEEE Symposium on VLSI Technology, Jun. 2018, pp. 129-130, https://doi.org/10.1109/VLSIT.2018.8510679.