Conducted-emission modeling for a high-speed ECL clock buffer

Total voltage sources and Thevenin equivalent circuits are derived by measurements and simulations using IBIS models to characterize the conducted emissions from ICs. The constructed noise source model for a test IC is applied in system-level simulations and the calculated far field radiation is val...

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Bibliographic Details
Published in2014 IEEE International Symposium on Electromagnetic Compatibility (EMC) pp. 594 - 599
Main Authors Shuai Jin, Yaojiang Zhang, Yan Zhou, Yadong Bai, Xuequan Yu, Jun Fan
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.08.2014
Subjects
Clocks
Harmonic analysis
Integrated circuit modeling
Load modeling
Noise
Voltage measurement
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Summary:Total voltage sources and Thevenin equivalent circuits are derived by measurements and simulations using IBIS models to characterize the conducted emissions from ICs. The constructed noise source model for a test IC is applied in system-level simulations and the calculated far field radiation is validated with measurements. The agreement between simulated and measured results demonstrates the effectiveness of the constructed model for characterizing the conducted emissions from an IC's I/O pins.
ISBN:9781479955442
1479955442
ISSN:2158-110X
2158-1118
DOI:10.1109/ISEMC.2014.6899040