Iterative QR decomposition architecture using the modified Gram-Schmidt algorithm

• Published in: 2009 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 1409 - 1412
• Main Authors: Kuang-Hao Lin, Chih-Hung Lin, Chang, R.C.-H., Chien-Lin Huang, Feng-Chi Chen
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2009
• Subjects: Computational efficiency; Computer architecture; Costs; Delay; Hardware; Iterative algorithms; Matrix decomposition; Numerical stability; Robust stability; Systolic arrays
• ISBN: 1424438276; 9781424438273
• ISSN: 0271-4302
• DOI: 10.1109/ISCAS.2009.5118029

Implementation of iterative QR decomposition (QRD) architecture based on the modified Gram-Schmidt (MGS) algorithm is proposed in this paper. In order to achieve computational efficiency with robust numerical stability, a triangular systolic array (TSA) for QRD of large size matrices is presented. Therefore, the TSA architecture can be modified into iterative architecture for reducing hardware cost that is called iterative QRD (IQRD). The IQRD hardware is constructed by the diagonal process (DP) and the triangular process (TP) with fewer gate counts and lower power consumption than TSAQRD. For a 4times4 matrix, the hardware area of the proposed IQRD can reduce about 76% of the gate counts in TSAQRD. For a generic square matrix of order n IQRD, the latency required is 2n-1 time units, which is based on the MGS algorithm. Thus, the total clock latency is only n(2n+3) cycles.