Predicting IC Defect Level Using Diagnosis

Predicting defect level (DL) using fault coverage is an extremely difficult task but if can be accomplished ensures high quality while controlling test cost. Because IC testing now involves generating and combining tests from multiple fault models, it is important to understand how the coverage from...

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Bibliographic Details
Published in2014 IEEE 23rd Asian Test Symposium pp. 113 - 118
Main Authors Cheng Xue, Blanton, R. D. Shawn
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.11.2014
Subjects
Circuit faults
Data models
defect level
diagnosis
fault model
Integrated circuit modeling
Mathematical model
Predictive models
Sociology
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Summary:Predicting defect level (DL) using fault coverage is an extremely difficult task but if can be accomplished ensures high quality while controlling test cost. Because IC testing now involves generating and combining tests from multiple fault models, it is important to understand how the coverage from each fault model relates to the overall DL. In this work, a new model is proposed which learns the effectiveness of fault models from the diagnostic results of defective chips, and predicts defect level using the derived measures of effectiveness and fault coverages of multiple fault models. The model is verified using fail data from an IBM ASIC and virtual fail data created through simulation. Experiment results demonstrate that this new model can predict DL more reliably than conventional approaches.
ISSN:1081-7735
2377-5386
DOI:10.1109/ATS.2014.31