A configurable analog buffer dedicated to a wafer-scale prototyping platform of electronic systems

• Published in: 2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) pp. 1 - 4
• Main Authors: Laflamme-Mayer, N., Sawan, M., Blaquiere, Y.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.02.2013
• Subjects: CMOS integrated circuits; Gain; Logic gates; MOS devices; Noise; Power supplies; Transistors

A novel, configurable and compact CMOS analog buffer, dedicated to a wafer-scale prototyping platform for electronic systems is described in this paper. The proposed buffer architecture, made in a 0.18 μm CMOS technology, is based on complementary modified differential pairs combined with single cur...