Evaluation of Cu/Ni/SnAg microbump bonding processes for thin-chip-on-chip package using a wafer-level underfill film
Three-dimension (3D) integration provides a promising approach to build complex microsystems through bonding and interconnection of individually optimized device layers without sacrificing system performance. The use of traditional underfill processes is expected to suffer an arduous challenge as th...
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Published in | 13th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems pp. 385 - 391 |
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Main Authors | , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.05.2012
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Subjects | |
Online Access | Get full text |
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Summary: | Three-dimension (3D) integration provides a promising approach to build complex microsystems through bonding and interconnection of individually optimized device layers without sacrificing system performance. The use of traditional underfill processes is expected to suffer an arduous challenge as the filled gap of a large scale chip is narrowed down to several micrometers. Consequently, the subsequent reliability of mirobump joints and the relative assembly compatibility of stacked chips of 3D integrated circuits (ICs) packages are therefore deteriorated. To resolve the foregoing critical issue, a novel technology of wafer-level underfill film (WLUF) is developed. The concerned steps like alignment of WLUF coated chip to substrate chip and voids elimination to make this technology work are demonstrated. However, the co-planarity of stacked thin chips after assembling with WLUF is an urgent problem and needs to understand in detail. For this reason, this research presents a non-linear finite element analysis (FEA) with process-oriented simulated technique to estimate the warpage of stacked thin chips. On account of experimental validation, the effects of several key designed factors on the thermo-mechanical behavior of chip-on-chip package under various bonding forces are investigated. The most important findings from analytic results indicate that with a consideration of chip thickness thinner than 50μm at the outermost region of packaging structure without microbumps, a about 2μm of gap betweens chips is significantly reduced. The above-mentioned phenomenon is attributed to a major structural support at the purlieus of chip only come from WLUF is extremely weak when a uniform bonding pressures is loaded. It is also found that the following cooling procedure of WLUF would further aggravate the warpage magnitude of stacked thin chips. All the results shown in the work could be as a guideline while the bonding reliability as well as the design of structural optimization for packaging assemblies with WLUF is further improved. |
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ISBN: | 9781424495337 1424495334 |
ISSN: | 1087-9870 2577-0799 |
DOI: | 10.1109/ITHERM.2012.6231455 |