Ultra-low dropout linear regulator using an SOI MESFET

• Published in: 2010 IEEE International SOI Conference (SOI) pp. 1 - 2
• Main Authors: Lepkowski, W, Wilk, S J, Bakkaloglu, B, Fechner, P S, Thornton, T J
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.10.2010
• Subjects: Current measurement; Logic gates; MESFETs; Regulators; Transient analysis; Voltage measurement
• ISBN: 9781424491308; 1424491304
• ISSN: 1078-621X; 2577-2295
• DOI: 10.1109/SOI.2010.5641384

The most critical aspect of a low dropout (LDO) regulator design is the choice of the pass transistor. It affects virtually every critical performance metric for the regulator including dropout and stability. Furthermore with the pass transistor consuming upwards of 70% of the die space, the commercial practicality of the LDO depends largely on the pass transistor's current drive per die area. A fully integrated LDO regulator based around a depletion mode, n-channel MESFET pass transistor was shown to work with stable and very fast transient (<;; lμs) operation across all line and load conditions without an output capacitor. Due to a few key design rules which adversely affected the layout size of that MESFET and consequently its current drive, the earlier LDO served mostly as a proof of concept for N-MESFET LDOs. The MESFET presented here was fabricated on Honeywell's 150nm SOI CMOS process without any changes to the process flow. It shows exciting potential for LDO applications with a drive current about 20x larger per mm2 while its gate leakage current is more than 100x smaller.