An on-die all-digital power supply noise analyzer with enhanced spectrum measurements
This paper presents a scalable all-digital power supply noise analyzer with 20GHz sampling bandwidth and 1mV resolution implemented in 32nm CMOS. This averaging-based analyzer measures power supply noise in both the equivalent-time and frequency domain with low-resolution VCO-based samplers. For fre...
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Published in | ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC) pp. 251 - 254 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.09.2014
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Subjects | |
Online Access | Get full text |
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Summary: | This paper presents a scalable all-digital power supply noise analyzer with 20GHz sampling bandwidth and 1mV resolution implemented in 32nm CMOS. This averaging-based analyzer measures power supply noise in both the equivalent-time and frequency domain with low-resolution VCO-based samplers. For frequency-domain measurements, it uses digital random phase-noise accumulation to remove correlation between the power supply noise and sampling clocks. In addition, the equivalent-time current step response is measured on-die to characterize the frequency-domain impedance of the power delivery network. |
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ISBN: | 1479956945 9781479956944 |
ISSN: | 1930-8833 2643-1319 |
DOI: | 10.1109/ESSCIRC.2014.6942069 |