AXIOM: A Scalable, Efficient and Reconfigurable Embedded Platform

• Published in: 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) pp. 480 - 485
• Main Authors: Giorgi, Roberto, Procaccini, Marco, Khalili, Farnam
• Format: Conference Proceeding
• Language: English
• Published: EDAA 01.03.2019
• Subjects: Cyber-Physical Systems; Embedded Systems; Energy Efficiency; Field programmable gate arrays; FPGA Programming; Hardware; Instruction sets; Libraries; Programming; Reconfigurable Systems; Task analysis; Thread Level Parallelization
• ISSN: 1558-1101
• DOI: 10.23919/DATE.2019.8715168

Cyber-Physical Systems (CPSs) are becoming widely used in every application that requires interaction between humans and the physical environment. People expect this interaction to happen in real-time and this creates pressure onto system designs due to the ever-higher demand for data processing in the shortest possible and predictable time. Additionally, easy programmability, energy efficiency, and modular scalability are also important to ensure these systems to become widespread. All these requirements push new scientific and technological challenges towards the engineering community. The AXIOM project (Agile, eXtensible, fast I/O Module), presented in this paper, introduces a new hardware-software platform for CPS, which can provide an easy parallel programming model and fast connectivity, in order to scale-up performance by adding multiple boards. The AXIOM platform consists of a custom board based on a Xilinx Zynq Ultrascale+ ZU9EG SoC including four 64-bit ARM cores, the Arduino socket and four high-speed (up to 18 Gbps) connectors on USB-C receptacles. By relying on this hardware, DF-Threads, a novel execution model based on dataflow modality, has been developed and tested. In this paper, we highlight some major conclusions of the AXIOM project, such as the gain in performance compared to other parallel programming models such as OpenMPI and Cilk.