Stackable thin film multi layer substrates with integrated passive components

• Published in: 56th Electronic Components and Technology Conference 2006 p. 8 pp.
• Main Authors: Zoschke, K., Buschick, K., Scherpinski, K., Fischer, T., Wolf, J., Ehrmann, O., Jordan, R., Reichl, H., Schmiickle, F.-J.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2006
• Subjects: Assembly systems; Consumer electronics; Integrated circuit interconnections; Joining processes; Packaging; Resistors; Stacking; Substrates; Testing; Transistors
• ISBN: 1424401526; 9781424401529
• ISSN: 0569-5503
• DOI: 10.1109/ECTC.2006.1645750

Visionary concepts for future electronic systems, which are ubiquitous, extremely miniaturized and serve a wide range of services, are extremely challenging for current system integration and packaging technologies. In the meaning of hetero system integration different integration techniques, such as 3D integration, integration of passive components and assembly of thin chips, have to be combined to enable a further increase in package density. This paper describes an approach for 3D system integration using thin stackable substrates with high density interconnection layers, which include integrated inductors, capacitors and resistors. After a brief overview of the different passive test structures, which were exclusively designed for the evaluation of this approach, the process flow for the technological realization of the substrates were presented. Some results of the electrical characterization of the fabricated integrated passive structures were discussed. Finally initial results for the stacking of the substrates were presented