RRAM-based Spiking Nonvolatile Computing-In-Memory Processing Engine with Precision-Configurable In Situ Nonlinear Activation
This work presents a hybrid CMOS-RRAM integration of spiking nonvolatile computing-in-memory (nvCIM) processing engine (PE) that includes a 64Kb RRAM macro and a novel in situ nonlinear activation (ISNA) module. We integrate the computing controller and nonlinear activation function on-chip to compu...
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Published in | 2019 Symposium on VLSI Technology pp. T86 - T87 |
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Main Authors | , , , , , , , , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
The Japan Society of Applied Physics
01.06.2019
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Subjects | |
Online Access | Get full text |
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