Emulation-Based Fault Effect Analysis for Resource Constrained, Secure, and Dependable Systems

• Published in: 2013 Euromicro Conference on Digital System Design pp. 337 - 344
• Main Authors: Druml, Norbert, Menghin, Manuel, Kroisleitner, Daniel, Steger, Christian, Weiss, Reinhold, Krieg, Armin, Bock, Holger, Haid, Josef
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.09.2013
• Subjects: Circuit faults; Emulation; Estimation-based Techniques; Fault Emulation; Hardware; Hardware Emulation; Power Analysis; Power demand; Security; Smart cards
• DOI: 10.1109/DSD.2013.43

Testing hardware and software components regarding their fault detection and fault handling capabilities is of vital importance. However, considering the fact that security systems are built using several distributed hardware components (e.g., reader/smart card authentication system), testing each component individually is insufficient. Because novel system-wide multi-fault attack campaigns can be conducted, fault propagation as well as fault handling of the entire system must be regarded. State-of-the-art emulation-based fault analysis approaches neglect this system aspect as well as the fault impact on power dissipation and power supply. Here, we present a novel analysis methodology that characterizes the behavior of complete systems during the design phase, in terms of fault handling, power dissipation, and power supply. Emulation-based techniques are applied to provide cycle accurate analysis information of the system-under-test in real time. The presented approach is of importance when it comes to test resource constrained, dependable, and high secure system designs. We demonstrate the application of this approach by means of a reader/smart card authentication system. Furthermore, we show how system level-based multi-fault attacks can be emulated and how the resulting system behavior (e.g., power consumption, power supply, information leakage) can be exploited to extract security relevant information.