Verification of Explicit Model Predictive Control Through Double-Lane-Change Maneuver

• Published in: Proceedings of the IEEE International Symposium on Industrial Electronics (Online) pp. 290 - 295
• Main Authors: Junho Lee, Hyuk-Jun Chang
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.06.2018
• Subjects: Autonomous vehicles; Computational complexity; Computational modeling; constrained optimization; double lane change; explicit model predictive control; Mathematical model; Microcontrollers; Model predictive control; multi-parametric quadratic programming; Optimization; Predictive control
• ISSN: 2163-5145
• DOI: 10.1109/ISIE.2018.8433622

In this paper, we analyze and verify explicit model predictive control (MPC) through the automated double-lane-change (DLC) maneuver by employing MATLAB/Simulink and CarSim. MPC has become a useful optimization method because it can anticipate future events of a system and fulfill constraints on states and inputs. However, the formidable computational complexities of online optimization are considered as a major drawback. Therefore, explicit MPC has been proposed and demonstrated to reduce the computational burden by treating the state vector as a parameter vector. This technique is referred to as multi-parametric quadratic programming (mp-QP). A DLC test of CarSim has been conducted to prove the efficacy of the proposed controller in an autonomous driving situation. In addition, a DLC test conducted using a driver model in CarSim, which is designed based on a MPC scheme, is presented for comparison with the proposed controller. The range of the prediction horizon is varied to explain the relation between the prediction horizon and the performance of the proposed controller; also, a variation of vehicle speed is implemented to prove the robustness of the proposed controller. The main contribution of this paper is to demonstrate the reduction of the computational loads of explicit MPC so that the MPC-based scheme can be designed using not only a 32-bit microcontrollers but also 16-bit, 8 bit- microcontrollers, or a field programmable gate array (FPGA), featuring relatively lower development costs and longer battery consistence.