Thermal issues in stacked die packages

After an introductory discussion of the thermal issues in stacked die packages in general, two major subjects are discussed in the paper: the qualification of die attach in stacked die structures and the questions of compact thermal modeling. An overview is given about the currently used techniques...

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Bibliographic Details
Published inSemiconductor Thermal Measurement and Management IEEE Twenty First Annual IEEE Symposium, 2005 pp. 307 - 312
Main Author Rencz, M.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2005
Subjects
Conducting materials
Conductive films
Electronic packaging thermal management
Electronics packaging
Integrated circuit packaging
Microassembly
Qualifications
Silicon
Thermal management
Thermal resistance
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Summary:After an introductory discussion of the thermal issues in stacked die packages in general, two major subjects are discussed in the paper: the qualification of die attach in stacked die structures and the questions of compact thermal modeling. An overview is given about the currently used techniques for the qualification of the die attach for failure analysis in stacked structures. The third part of the paper presents the state-of-the-art and the major issues of compact thermal modeling of stacked die packages.
ISBN:0780389859
9780780389854
ISSN:1065-2221
DOI:10.1109/STHERM.2005.1412197