ESD ballasting of Ge FinFET ggNMOS devices

High access resistance is the main limiter for implementation of Germanium into NMOS FinFET device. Growing alternative material on the source-drain (SD) area such as SiGe or Si can solve this issue. Grounded gate NMOS (ggNMOS) devices with five different SD stacks are studied w.r.t. ESD failure lev...

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Bibliographic Details
Published in2017 IEEE International Reliability Physics Symposium (IRPS) pp. 3F-3.1 - 3F-3.6
Main Authors Boschke, Roman, Shih-Hung Chen, Scholz, Mirko, Hellings, Geert, Linten, Dimitri, Witters, Liesbeth, Collaert, Nadine, Groeseneken, Guido
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.04.2017
Subjects
Contact resistance
Electrostatic discharges
ESD
FinFET
FinFETs
Germanium
Resistance
Robustness
Silicon
Stress
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Summary:High access resistance is the main limiter for implementation of Germanium into NMOS FinFET device. Growing alternative material on the source-drain (SD) area such as SiGe or Si can solve this issue. Grounded gate NMOS (ggNMOS) devices with five different SD stacks are studied w.r.t. ESD failure level and R on . Small series resistance due to low contact and SD resistance results in very low R on , but harms the ESD robustness dramatically. It was found that high contact resistance and SD resistance act as ballasting resistor similar to the effect of silicide block reported for Si technologies. It prevents current crowding and leads to very uniform conduction. This affect was verified by emission microscope (EMMI) analysis.
ISSN:1938-1891
DOI:10.1109/IRPS.2017.7936300