A power-aware adaptive routing scheme for network on a chip

NoC (Network on a chip) is being proposed as a scalable and reusable communication platform for future SoC (System on a chip) applications. Power is a critical issue in interconnection network design, driven by power-related design constraints, such as power distribution optimization and thermal pro...

Full description

Saved in:
Bibliographic Details
Published in2007 7th International Conference on ASIC pp. 1301 - 1304
Main Authors Sheng-guang Yang, Li Li, Yu-ang Zhang, Bing Zhang, Yi Xu
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2007
Subjects
Constraint optimization
Design optimization
Heuristic algorithms
Multiprocessor interconnection networks
Network-on-a-chip
NoC
power
Power distribution
Power system modeling
Power system protection
Routing
routing scheme
System-on-a-chip
Online AccessGet full text

Cover

More Information
Summary:NoC (Network on a chip) is being proposed as a scalable and reusable communication platform for future SoC (System on a chip) applications. Power is a critical issue in interconnection network design, driven by power-related design constraints, such as power distribution optimization and thermal protection design, especially when network becomes huge. In this work, we present an on-chip routing scheme based on a new power model and dynamic XY routing algorithm, which can adapt routing decision based on power conditions, optimize power distribution and avoid hotspots occurring in the network. To verify the routing scheme, a SystemC-based NoC(Mesh4times4) simulator is built. Experiments demonstrate the proposed routing scheme can effectively regulate network power distribution to meet power balance requirement (maximum and variance of power can decrease by 8.1% and 21.1% at best respectively) with negligible network performance penalty.
ISBN:1424411319
9781424411313
ISSN:2162-7541
2162-755X
DOI:10.1109/ICASIC.2007.4415875