Electrical characteristics of single, double & surround gate vertical MOSFETs with reduced overlap capacitance

The vertical MOSFET structure is one of the solutions for reducing the channel length of devices under 50 nm. Surround gate structures can be realized which offer improved short channel effects and more channel width per unit silicon area. In this paper, a low overlap capacitance, surround gate, ver...

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Published inESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003 pp. 533 - 536
Main Authors Gili, E., Kunz, V.D., de Groot, C.H., Uchino, T., Donaghy, D., Hall, S., Ashburn, P.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2003
Subjects
Capacitance
Computer science
Dry etching
Electric variables
Electrodes
Fabrication
Lithography
MOSFET circuits
Oxidation
Silicon
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Summary:The vertical MOSFET structure is one of the solutions for reducing the channel length of devices under 50 nm. Surround gate structures can be realized which offer improved short channel effects and more channel width per unit silicon area. In this paper, a low overlap capacitance, surround gate, vertical MOSFET technology is presented, which uses fillet local oxidation (FILOX) to reduce the overlap capacitance between the gate and the drain on the bottom of the pillar. Electrical characteristics of surround gate n-MOSFETs are presented and compared with results from single gate and double gate devices on the same wafer. The devices show good symmetry between the source on top and source on bottom configuration. The short channel effects of the surround gate MOSFETs are investigated.
ISBN:0780379993
9780780379992
DOI:10.1109/ESSDERC.2003.1256931