Reverse bias lifetime reliability assessments of HV GaN power device

• Published in: 2017 IEEE International Reliability Physics Symposium (IRPS) pp. 3B-1.1 - 3B-1.6
• Main Authors: Veereddy, Deepak, Khalil, Sameh G., Kannan, Hari, Dip, Andrew, Hyeongnam Kim, Zhaofeng Wang, Crandell, Mark, Imam, Mohamed, McDonald, Tim, Charles, Alain
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.04.2017
• Subjects: Application profile; Degradation; failure mechanism; Gallium nitride; GaN; Life estimation; Logic gates; qualification; Qualifications; Reliability; reverse bias; Stress
• ISSN: 1938-1891
• DOI: 10.1109/IRPS.2017.7936281

This paper reports the reliability assessments of 600 V rated GaN-on-Si based depletion mode prototype MIS power transistors under reverse bias operation. In this study, the impact of two gate module processes on the device reliability was investigated through the accelerated tests conducted at voltages >600 V and temperatures ≤150 °C. These tests established gate dielectric breakdown as the failure mode and a probable mechanism triggering this failure type has been hypothesized. And the related failure activation energies of 0.90 eV and 0.71 eV for the two processes were extracted. The results unveil that device reliability in reverse bias operation can be improved with gate module optimizations. There is no existing GaN specific industry HTRB qualification standard. We present the methodology of translating the hypothetical application profiles to equivalent qualification HTRB duration using the GaN failure degradation models.