The multi-rate Iterated Timing Analysis algorithm for circuit simulation

In circuit simulation, Relaxation-based algorithms have been proven to be faster and more flexible than the standard direct approach used in SPICE. ITA (Iterated Timing Analysis) algorithm has even been widely used in industry. This paper describes accelerating techniques that enable ITA to utilize...

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Bibliographic Details
Published in2010 53rd IEEE International Midwest Symposium on Circuits and Systems pp. 821 - 824
Main Authors Chun-Jung Chen, Chun-Chia Chang, Chih-Jen Lee, Chang-Lung Tsai, Chang, A Y, Jenn-Dong Sun
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.08.2010
Subjects
Acceleration
Algorithm design and analysis
Circuit analysis
Circuit simulation
Delay
Difference equations
SPICE
Sun
Timing
Virtual manufacturing
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Summary:In circuit simulation, Relaxation-based algorithms have been proven to be faster and more flexible than the standard direct approach used in SPICE. ITA (Iterated Timing Analysis) algorithm has even been widely used in industry. This paper describes accelerating techniques that enable ITA to utilize circuits' multi-rate behaviors. These techniques are based on the latency property of subcircuits and the Strength of Signal Flow (SSF) between subcircuits. A more powerful technique using both latency and SSF is also proposed. Experimental examples are given to justify the superior properties of proposed methods.
ISBN:1424477719
9781424477715
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2010.5548685