A novel flash erase EEPROM memory cell with asperities aided erase
A novel 2 flash erase EEPROM, memory cell structure is presented. The cell uses triple poly layers and two independent N + implants. The first poly is used as the control gate, the second poly as the floating gate and the third poly as arc erase electrode. Cell programminng is avalanche injection of...
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Published in | ESSDERC '90: 20th European Solid State Device Research Conference pp. 177 - 180 |
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Main Author | |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.09.1990
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Subjects | |
Online Access | Get full text |
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Summary: | A novel 2 flash erase EEPROM, memory cell structure is presented. The cell uses triple poly layers and two independent N + implants. The first poly is used as the control gate, the second poly as the floating gate and the third poly as arc erase electrode. Cell programminng is avalanche injection of hot electrons into the floating gate, while erasure is performed by asperities-aided Fowler Nordheim tunneling of electrons. Asperities introduced at the top surface of the floating poly gate allow using thicker interpoly oxide at lower erase voltage and less than 0.1 second erase time. |
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ISBN: | 9780750300650 0750300655 |