A process variation compensation scheme using cell-based forward body-biasing circuits usable for 1.2V design

A cell-based forward body-biasing technique to suppress the global process variation and its design flow are proposed. Latch-up free operation is guaranteed by embedded current source cells and limiter cells even when supply voltage is 1.2 V with small area overhead. By applying this technique to a...

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Bibliographic Details
Published in2008 IEEE Custom Integrated Circuits Conference pp. 29 - 32
Main Authors Tachibana, F., Sato, H., Yamashita, T., Hara, H., Kitahara, T., Nomura, S., Yamane, F., Tsuboi, Y., Seki, K., Matsumoto, S., Watanabe, Y., Hamada, M.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.2008
Subjects
Bipolar transistors
Circuits
CMOS technology
Delay
Microelectronics
MOS devices
Power dissipation
Threshold voltage
Variable structure systems
Voltage control
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Summary:A cell-based forward body-biasing technique to suppress the global process variation and its design flow are proposed. Latch-up free operation is guaranteed by embedded current source cells and limiter cells even when supply voltage is 1.2 V with small area overhead. By applying this technique to a media processor, the worst-case delay is reduced by 20% without sacrificing the maximum leakage spec.
ISBN:9781424420186
1424420180
ISSN:0886-5930
2152-3630
DOI:10.1109/CICC.2008.4672012