Efficiency of low-power design techniques in multi-gate FET CMOS circuits

Energy dissipation, performance, and voltage scaling of multi-gate FET (MuGFET) based CMOS circuits are analyzed using product-representative test circuits composed of 10k devices. The circuits are fabricated in a low power MuGFET CMOS technology, achieve clock frequencies of 370-500MHz at VDD=1.2V,...

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Bibliographic Details
Published inESSDERC 2007 - 37th European Solid State Device Research Conference pp. 111 - 114
Main Authors Pacha, C., von Arnim, K., Bauer, F., Schulz, T., Xiong, W., San, K.T., Marshall, A., Baumann, T., Cleavelin, C.-R., Schruefer, K., Berthold, J.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.2007
Subjects
Circuit analysis
Circuit testing
Clocks
CMOS technology
Energy dissipation
FETs
Frequency
Performance analysis
Scalability
Voltage
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Summary:Energy dissipation, performance, and voltage scaling of multi-gate FET (MuGFET) based CMOS circuits are analyzed using product-representative test circuits composed of 10k devices. The circuits are fabricated in a low power MuGFET CMOS technology, achieve clock frequencies of 370-500MHz at VDD=1.2V, and operate down to the subthreshold region. Voltage scalability of MuGFET circuits is superior to sub-100 nm planar CMOS circuits due to excellent short-channel effect control.
ISBN:1424411238
9781424411238
ISSN:1930-8876
DOI:10.1109/ESSDERC.2007.4430891