Design of a linearly increasing inrush current limit circuit for DC-DC boost regulators
This paper presents a CMOS circuit, designed for smoothing out the inrush current of DC-DC boost regulator. A current-on-capacitor based clamped reference is designed along with common source amplifier and high speed comparator. The linearly varying reference is clamped using a MOSFET connected in d...
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Published in | APCCAS 2010-2010 IEEE Asia Pacific Conference on Circuits and Systems pp. 863 - 866 |
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Main Authors | , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.12.2010
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Subjects | |
Online Access | Get full text |
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Summary: | This paper presents a CMOS circuit, designed for smoothing out the inrush current of DC-DC boost regulator. A current-on-capacitor based clamped reference is designed along with common source amplifier and high speed comparator. The linearly varying reference is clamped using a MOSFET connected in diode configuration, ensuring a smooth transition from ramp mode to normal mode, which is a unique feature of this proposed circuit. The input inductor current is sensed using a small resistance connected at the source of the NMOS power transistor producing a sense voltage. The sense voltage is then compared with the linearly increasing reference. The circuit produces smoothed out inductor current envelop compared to conventional discrete step start up current shapes. The smoothed out inductor current increases the reliability and performance of the boost regulator. The circuit is simulated in HSPICE with 0.5µm CMOS process technology model. |
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ISBN: | 142447454X 9781424474547 |
DOI: | 10.1109/APCCAS.2010.5774913 |