Design and evaluation of Side Channel Attack resistant asynchronous AES Round Function

A novel Asynchronous AES Round Function design is proposed in this paper, which offers increased Side-Channel Attack (SCA) resistance by combining the advantages of dual rail encoding and clock free operation. The design is based on a Delay Insensitive (DI) logic paradigm known as Null Convention Lo...

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Bibliographic Details
Published in2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) pp. 410 - 413
Main Authors Kotipalli, Siva Pavan Kumar, KyungKi Kim, Yong-Bin Kim, Minsu Choi
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.08.2012
Subjects
Cryptography
Power demand
Rails
Resistance
Signal to noise ratio
Switches
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Summary:A novel Asynchronous AES Round Function design is proposed in this paper, which offers increased Side-Channel Attack (SCA) resistance by combining the advantages of dual rail encoding and clock free operation. The design is based on a Delay Insensitive (DI) logic paradigm known as Null Convention Logic. By reducing switching activity and thereby Signal-to-Noise (SNR) ratio, the proposed design leaks far less side channel information than traditional approaches and this feature boosts SCA resistance of this approach. Functional verification and WASSO analysis simulations were carried out on both synchronous approach and the proposed NCL based approach using Xilinx simulation tools to validate the claims related to benefits of employing this novel dual rail design approach.
ISBN:1467325260
9781467325264
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2012.6292044