Impedance transparency design for PCI-Express Gen 3 SerDes channel on HDI PCBs

AC-coupling capacitor and transition via are the two areas discussed in this paper for the impedance transparency design of a PCI Express Gen 3 backplane channel. The simulation results show that the optimized ground gap for the AC-coupling capacitors and the optimized transition vias helps improve...

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Bibliographic Details
Published in2014 IEEE International Symposium on Electromagnetic Compatibility (EMC) pp. 631 - 635
Main Authors Jue Chen, Sen, Bidyut
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.08.2014
Subjects
AC-coupling capacitor
Backplanes
Capacitors
Electromagnetic compatibility
Impedance
Optimization
PCI Express
Solid modeling
Three-dimensional displays
transition via
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Summary:AC-coupling capacitor and transition via are the two areas discussed in this paper for the impedance transparency design of a PCI Express Gen 3 backplane channel. The simulation results show that the optimized ground gap for the AC-coupling capacitors and the optimized transition vias helps improve the channel impedance transparency.
ISBN:9781479955442
1479955442
ISSN:2158-110X
2158-1118
DOI:10.1109/ISEMC.2014.6899047