ESD protection design for wideband RF applications in 65-nm CMOS process

All wireless communication products must meet the reliability specifications during mass production. To prevent from electrostatic discharge (ESD) damages, the ESD protection designs must be added at all input/output pads in chip. Some ESD protection designs with low parasitic capacitance for radio-...

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Bibliographic Details
Published in2014 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 1480 - 1483
Main Authors Li-Wei Chu, Chun-Yu Lin, Ming-Dou Ker, Ming-Hsiang Song, Jen-Chou Tseng, Chewn-Pu Jou, Ming-Hsien Tsai
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2014
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Summary:All wireless communication products must meet the reliability specifications during mass production. To prevent from electrostatic discharge (ESD) damages, the ESD protection designs must be added at all input/output pads in chip. Some ESD protection designs with low parasitic capacitance for radio-frequency (RF) applications are reviewed in this paper. Besides, a novel ESD protection design is proposed and realized in a 65nm CMOS process to protect the wideband RF circuits. In this work, diodes are used for ESD protection and inductors are used for high-frequency performance fine tuning. Experimental results of the test circuits have been successfully verified.
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2014.6865426