High voltage SOI MESFETs at the 45nm technology node

Enhanced voltage SOI MESFETs have been demonstrated on a highly scaled CMOS process. Their DC and RF performance along with reproducibility suggests that they would be ideal in a variety of analog and PA applications. Also, since they can be fabricated alongside the 45nm CMOS [4], they appear suitab...

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Bibliographic Details
Published in2012 IEEE International SOI Conference (SOI) pp. 1 - 2
Main Authors Lepkowski, W., Wilk, S. J., Ghajar, M. R., Thornton, T. J.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2012
Subjects
CMOS integrated circuits
CMOS technology
Logic gates
MESFETs
Stress
Threshold voltage
Voltage measurement
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Summary:Enhanced voltage SOI MESFETs have been demonstrated on a highly scaled CMOS process. Their DC and RF performance along with reproducibility suggests that they would be ideal in a variety of analog and PA applications. Also, since they can be fabricated alongside the 45nm CMOS [4], they appear suitable for system-on-chip applications as an interface between high voltage external devices and the low voltage CMOS. While these initial results are encouraging, new MESFET geometries and structures have been taped out to further enhance the breakdown voltage. Lastly, with continued layout optimization it is expected that the variance between devices will be reduced.
ISBN:9781467326902
1467326909
ISSN:1078-621X
2577-2295
DOI:10.1109/SOI.2012.6404403