A digitally modulated 2.4GHz WLAN transmitter with integrated phase path and dynamic load modulation in 65nm CMOS

• Published in: 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers pp. 330 - 331
• Main Authors: Lu Ye, Jiashu Chen, Lingkai Kong, Cathelin, P., Alon, E., Niknejad, A.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.02.2013
• ISBN: 9781467345156; 1467345156
• ISSN: 0193-6530; 2376-8606
• DOI: 10.1109/ISSCC.2013.6487756

In order to support higher throughputs, the power consumption of 2-to-5GHz Wi-Fi transmitters (TXs) has been continuously rising, and has hence become increasingly problematic for mobile devices. To extend battery life, the TX must be efficient not only at peak power but also at backoff, due to the use of high Peak-to-Average-Power-Ratio (PAPR) OFDM modulation. Many recent works have aimed to enhance PA efficiency at back-off powers [1-4], but relatively few have integrated these techniques into a complete TX system. For example, previous designs employing digital polar or outphasing architectures often realized phase modulation with off-chip instruments. Similarly, while good close-in spectral performance has been shown, far-out spectral images remain problematic for TXs where the PA itself is digitally modulated. Moreover, previous works often do not include overhead from components such as extra DC-DC converters (for multiple PA supplies) or did not implement on-chip matching networks (MN) and/or output baluns, all of which directly affect the overall efficiency of integrated CMOS PAs.