Comprehensive Thermal SPICE Modeling of FinFETs and BEOL with Layout Flexibility Considering Frequency Dependent Thermal Time Constant, 3D Heat Flows, Boundary/Alloy Scattering, and Interfacial Thermal Resistance with Circuit Level Reliability Evaluation

Thermal SPICE modeling with distributed R th -C th network is proposed to provide more accurate AC self-heating (SH) results than two τ c and one τ c models. The thermal time constant of the hotspot (τhotspot) in FinFETs is frequency dependent, not a constant. The severe SH by boundary/alloy scatter...

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Bibliographic Details
Published in2018 IEEE Symposium on VLSI Technology pp. 113 - 114
Main Authors Yan, Jhih-Yang, Chung, Chia-Che, Jan, Sun-Rong, Lin, H. H., Wan, W. K., Yang, M.-T., Liu, C. W.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2018
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Summary:Thermal SPICE modeling with distributed R th -C th network is proposed to provide more accurate AC self-heating (SH) results than two τ c and one τ c models. The thermal time constant of the hotspot (τhotspot) in FinFETs is frequency dependent, not a constant. The severe SH by boundary/alloy scattering and interfacial thermal resistance (ITR) is included in our SPICE. The modularized components of fins, metals, and IMDs provide device and routing flexibility, without additional FEM simulation. ITR of Si 80 Ge 20 /Si 1- xGe x is calculated by AMM model as the lower bound for SiGe FinFETs. The intrinsic electromigration (EM) improvement of Co interconnect (5X) is countervailed (5X→2.44X) by the increasing T metal due to the low thermal conductivity of Co. Different V2 placements on the power line of a ring oscillator (RO) are proposed to lower both the T j (FinFET) and T metal . The predicted EM MTTF of Co interconnect with the additional heat dissipation by V2 insertion is ~5.65X of W/Cu interconnect.
ISSN:2158-9682
DOI:10.1109/VLSIT.2018.8510701