Fully On chip area efficient LDO voltage regulator

A novel full on-chip, area efficient low dropout linear regulator is presented in this paper. This LDO is designed with a recycling folded cascode error amplifier that offers very good stability and a load regulation of 6.760μV/mA. A refined frequency compensation scheme is used which maintains LDO...

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Bibliographic Details
Published inTENCON 2014 - 2014 IEEE Region 10 Conference pp. 1 - 5
Main Authors Suresh, A., Patri, Sreehari Rao, Dwibedy, Debasish, Bhat, Sunilkumar, Gaurav, K., Krishnaprasad, K. S. R.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2014
Subjects
Capacitors
High slew rate
low-dropout regulator
low-quiescent current
Recycling
recycling folded cascode error amplifier
Regulators
System-on-chip
Transient response
Transistors
Voltage control
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Summary:A novel full on-chip, area efficient low dropout linear regulator is presented in this paper. This LDO is designed with a recycling folded cascode error amplifier that offers very good stability and a load regulation of 6.760μV/mA. A refined frequency compensation scheme is used which maintains LDO stability over entire load current range i.e. 0-100mA and fast transient response without any necessity of output capacitor. The overshoot/undershoot in the output voltage under the extreme load transients are 195.3mV /71.7mV. The area of the presented LDO is greatly reduced due to removal of on-chip high output capacitance. The area of presented LDO is only 0.05 mm 2 . The LDO presented requires a bias current of 70μA and 200mV dropout voltage and is designed in 180nm technology.
ISBN:1479940763
9781479940769
ISSN:2159-3442
2159-3450
DOI:10.1109/TENCON.2014.7022464