Predictive full circuit ESD simulation and analysis using extended ESD compact models: Methodology and tool implementation

We present a new ESD compact modeling methodology using Verilog-A to enable predictive full circuit ESD simulation along with supporting hardware and failure analysis results. We also present a new ESD tool (ESTEEM) to automate the ESD design simulation and optimization flow for circuit designers. T...

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Bibliographic Details
Published inElectrical Overstress/Electrostatic Discharge Symposium Proceedings 2010 pp. 1 - 8
Main Authors Junjun Li, Gauthier, R, Joshi, A, Lundberg, M, Connor, J, Shunhua Chang, Mitra, S, Muhammad, M
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2010
Subjects
Analytical models
Electrostatic discharge
Integrated circuit modeling
Inverters
Logic gates
MOS devices
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Summary:We present a new ESD compact modeling methodology using Verilog-A to enable predictive full circuit ESD simulation along with supporting hardware and failure analysis results. We also present a new ESD tool (ESTEEM) to automate the ESD design simulation and optimization flow for circuit designers. Test results show excellent simulation to hardware data correlation.