CMOS/SOI half-flash A/D converter

A SOI A/D converter with half-flash architecture is designed and fabricated in the paper. In the converter, an 8-bit conversion consists of two 4-bit all-parallel A/D converters, and a chopper zero-stability architecture is used as a comparator. The converter with a simple structure has the function...

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Bibliographic Details
Published inIEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions Vol. 2; pp. 1725 - 1727 vol.2
Main Authors Zhengfan Zhang, Yongguang Liu, Zhaoji L, Shiliu Xu
Format Conference Proceeding
LanguageEnglish
Published IEEE 2002
Subjects
Analog-digital conversion
CMOS technology
Flip-flops
MOSFET circuits
Paper technology
Radiation hardening
Silicon devices
Silicon on insulator technology
Solid state circuits
Voltage
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Summary:A SOI A/D converter with half-flash architecture is designed and fabricated in the paper. In the converter, an 8-bit conversion consists of two 4-bit all-parallel A/D converters, and a chopper zero-stability architecture is used as a comparator. The converter with a simple structure has the function of voltage offset. The back gate bias structure of CMOS/SOI circuits is developed and the full depletion CMOS/SOI technology is used. The chip area of the converter is 3.5/spl times/3.7 mm/sup 2/, the conversion rate is 1 MS/s, the instantaneous /spl gamma/-rate is 1/spl times/10/sup 11/ rad (Si)/s, and the total dose radiation level is 1/spl times/10/sup 5/ rad (Si).
ISBN:9780780375475
0780375475
DOI:10.1109/ICCCAS.2002.1179109